Job Tracker
Arago — Performance Software Engineer
Rejected
Status
- Added
- 27 August 2026
- Location
- France, North America, and Israel
- Description
- Meet Arago and the Aragonians Arago is an AI and computer hardware company whose mission is to drive the course of history forward. We do so by accelerating breakthroughs at the intersection of AI and semiconductors. Founded in 2024 by AI researchers and physicists with deep expertise in photonics, electronics, software, mathematics, and machine learning, Arago brings together a lean team of engineers and scientists from the world's top companies and research labs. Composed of nine nationalities and operating from hubs in France, North America, and Israel, we believe in great science and fast achievements. Our work is guided by these core principles: - Do great things: we deliver work we're proud to sign our name to. - High velocity: speed matters. We move quickly, one step at a time. - One unit: we're all in this together, with relationships grounded in trust, respect, and camaraderie. Arago is backed by executives from Apple, Arm, Nvidia, Microsoft, and Hugging Face, as well as prominent US and European deeptech venture firms and exited founders. WHAT YOU'LL DO: As a Performance Software Engineer, you will be instrumental in building the core computation software that runs on Arago's custom AI accelerators. Your work will bridge the gap between host systems and proprietary hardware, encompassing everything from custom on-board kernels to sophisticated tooling required for real-time debugging. You will be a key player in chip bring-up and long-term development of high-performance computation primitives and kernels, ensuring architecture operates with maximum efficiency and deterministic performance. REQUIRED SKILLS AND EXPERIENCE: - Bachelor's, Master's, or PhD in Computer Science, Computer Engineering, or related field - Strong experience in low-level systems programming using C/C++ and assembly - Deep familiarity with bare-metal development: startup code, linker scripts, memory layout, MMIO, interrupts/exceptions, timers, synchronization, and direct peripheral access - Strong understanding of computer architecture: pipelines, caches, memory hierarchies, virtual/physical addressing, atomics, DMA, and performance implications - Hands-on experience with RISC-V and/or ARM architectures, instruction sets, calling conventions, ABI concepts, and architecture-specific intrinsics - Experience debugging hardware/software interactions using GDB, JTAG, trace/debug interfaces, simulators, emulators, or FPGA platforms - Ability to read hardware specifications, register descriptions, and RTL-level documentation - Strong performance-analysis and optimization skills: profiling, disassembly inspection, compiler optimization, hand-tuned assembly - English at proficient level; French is a plus RESPONSIBILITIES: - Develop and optimize low-level software primitives in C/C++, assembly, and architecture-specific intrinsics for RISC-V and ARM platforms - Implement performance-critical kernels, runtime components, hardware abstraction layers, drivers, and firmware in bare-metal or constrained environments - Work with hardware architects and RTL/design teams on hardware-software interfaces, memory maps, register interfaces, interrupts, synchronization, and boot flows - Analyze and optimize software for latency, throughput, memory footprint, instruction count, and efficient processor/accelerator feature use - Bring up and debug software on simulation, emulation, FPGA, and silicon platforms - Develop validation tests, benchmarks, and diagnostic tools for processor, DSP, accelerator, and SoC functionality - Contribute to architecture decisions around ISA extensions, compiler intrinsics, memory hierarchy, DMA, cache/coherency, and software-visible hardware features PAY AND BENEFITS: - Competitive cash compensation based on location, experience, and team parity - Meaningful stock option plan at earliest company stage - Relocation bonus and moving expense coverage (within 20 min of company location) - Healthcare coverage, pension contributions, professional development, 25 days PTO plus public holidays - Ownership of key technical domain with vertical and horizontal growth opportunities - 50% reimbursement of public transport subscription - High-paced, multicultural, engineering-led environment HIRING PROCESS: 1. Screening Call 2. Technical meeting 3. CEO Interview 4. Reference Calls 5. Technical Assessment 6. Final Interview